Support for a wider range of CPUs, toolchains
@nikomatsakis
I’m not an expert on what is required, but I understand that there are many, many ARM families
Yes, there are a lot.
We currently support, as tier 2, the ARMv6, ARMv7-A and ARMv8-A architecture. These are used in application processors, have CPU frequencies in the GHz range and usually run an OS, e.g. Linux. We provide std, rustc and cargo binaries for these architectures.
Then there is the ARMv6-M and ARMv7-M architectures. These are used in microcontrollers, which have CPU frequency in the low range of MHz (usually less than 100 MHz) and low amount of RAM (usually in the order of dozens of KBs). Right now, we don’t “officially” support these at all but you can write Rust programs for these architecture if you implement your own target definition and build core yourself. There’s a RFC to add target definitions for these architecture to the compiler, as well as start providing binary releases of (a smaller subset of) std for these targets.
There is also the new ARMv8-M architecture, which is an upgrade of the ARMv7-M architecture. AFAIK, there are no implementations of this architecture in the market yet, so there are no reports of anyone using Rust on these devices. However, LLVM already supports the architecture.
There are also the ARMv7-R and ARMv8-R architectures. These are used in “real time” processors but I don’t know anything else about them …
Frankly, making things into a Tier 1 platform (meaning, fully tested) puts a big strain on our testing resources
To add some numbers. Running the unit tests of the “standard” crates (std and all its dependencies) under QEMU (because we don’t have hardware for every single architecture) takes about 15 minutes (on Travis; it would probably take a little less on the buildbots). That’s 15 minutes more PER target on every tested PR. And that’s not enough to elevate the target to tier 1 because we would still have to run the test suite (run-make, compile-fail, etc) of their compilers – that would probably take hours under QEMU.
If there are not enough resources to test these targets on each PR, perhaps we could tests these targets (at least std unit tests) on a “nightly” basis. Would that elevate them to tier … 1.5?
@cuviper
the rest don’t have bootstrap binaries for rustc and cargo, especially ppc64 and ppc64le I’d hope for next.
Sofware-wise, we should already have all the requirements to start producing rustc and cargo binaries for these targets. The issue is again: resources.
What’d I miss?
puts ARM microcontroller hacker hat on
I’d like to see:
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On the fly compilation of standard crates for custom targets using Cargo. Basically, this RFC accepted and implemented. One shouldn’t need to manually compile core and manage their sysroot or, worse, reach out to Makefiles to build a no_std executable for a custom target.
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Either the target definitions for the ARMv*-M architecture built into the compiler or officially distributed as .json files. One shouldn’t need to figure out how to write these and the definition shouldn’t break on a nightly update.
With that, I’ll be happier on nightly. Moving to stable would, at a minimum, require fixing these issues somehow:
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asm! is nightly forever.
- I need
lang = "panic_fmt" to build no_std executables.
@steveklabnik
One thing that comes up continually for in this space is “float-free libcore”.
I thought this was fixed with a custom target or with a bunch of codegen options. I wish more x86 kernel/OS devs answered this question I asked a while ago.