Slower code with "-C target-cpu=native"

[quaternic]

In https://www.agner.org/optimize/blog/read.php?i=285#285 Agner Fog made this observation about the Piledriver architecture:

Memory writes with the 256-bit AVX registers are exceptionally slow. The measured throughput is 5 - 6 times slower than on the previous model (Bulldozer), and 8 - 9 times slower than two 128-bit writes. No explanation for this has been found. This design flaw is likelty to negate any advantage of using the AVX instruction set.

LLVM doesn't seem to be aware of that, as it happily uses AVX if enabled.