# \#\[repr(Interoperable\_2024)\] **URL:** \ **Category:** Uncategorized\ **Created:** [June 7, 2022, 8:32pm UTC](https://internals.rust-lang.org/t/repr-interoperable-2024/16763 "2022-06-07T20:32:26Z")\ **Posts on this page:** 1\ **Showing post:** 18
**Author:** ![programmerjake](https://sea2.discourse-cdn.com/flex002/user_avatar/internals.rust-lang.org/programmerjake/32/5893_2.png) [@programmerjake](https://internals.rust-lang.org/u/programmerjake)\ **Post date:** [June 8, 2022, 8:06am UTC](https://internals.rust-lang.org/t/repr-interoperable-2024/16763/18 "2022-06-08T08:06:32Z")
Imho, it would be really neat to end up with an ABI that works across different ISAs, such that I could have a function in x86\_64 call a function in AArch64 call a function in RV64GC, etc. This mostly requires memory layouts (structs, enums, etc.) to be identical, different register layouts and calling conventions can be handled using trampolines. Trampolines can't handle translating between different memory layouts in the general case, since some things just can't be moved, such as a shared atomic variable. I have some ideas for how to implement a processor that has a reprogrammable decoder such that it can easily be made to run any ISA you can think of... [https://bugs.libre-soc.org/show\_bug.cgi?id=841](https://bugs.libre-soc.org/show_bug.cgi?id=841) --- _[View the full topic](https://internals.rust-lang.org/t/repr-interoperable-2024/16763)._