LLVM supports conditional compare of a pair of integer or float scalars or vectors, generating an i1 or N x i1 result
- <result> = icmp <cond> <ty> <op1>, <op2>
yields i1 or <N x i1>:result
where cond = {eq, ne, ugt, uge, ult, ule, sgt, sge, slt, sle}
and the prefix `u` means "unsigned" while the prefix `s` means "signed".
- <result> = fcmp [fast-math flags]* <cond> <ty> <op1>, <op2>
yields i1 or <N x i1>:result
where cond = {false, oeq, ogt, oge, olt, ole, one, ord, ueq, ugt, uge, ult, ule, une, uno, true}
and the prefix `o` means "ordered and …" while the prefix 'u' means "unordered or …".
Many Rust Tier 1 ISAs support the scalar integer compares and some variety of the float compares in single instructions. Some earlier ARM ISAs (e.g., Cortex M) require a cumbersome multi-instruction sequence. Other ISAs used in IoT devices might not have any support at all.