I don't know if target_feature is going to apply to the avr-rust effort, but: on most avr devices (like the Atmega128 introduced in 2002), opcodes 0xa000-0xafff decode to LDD/STD instructions; however, there is a "reduced core" instruction set, used in Atmega ATTiny10-type devices (introduced in 2009), where 0xa000-0xafff decode to the similarly-named but differently functional LDS/STS instructions. (the LDS opcode fetches from a 7-bit offset into SRAM; LDD takes a 6-bit offset which is added to the Y register to address the SRAM)
(Also, in general , avr cpus do not have any kind of "illegal instruction" signal)