I successfully cross compile rust programs for arm v5te (arm926ej-s) . I followed the procedure described here .
I need to change the file arm_unknown_linux_gnueabi.rs to replace +v6 to +v5te otherwise invalid instruction was generated at runtime. (I’m using rust head version).
I would like to do the same operation for arm v4t (arm7tdmi).
I adapted the source arm_unknown_linux_gnueabi.rs to set target option feature to +v4t.
No problem to execute a basic program (hello world) on the target but when I execute a more complicated program (e.g. iron or rustless web server) I receive an illegal instruction.
gdb disassembling the core dump file gives :
0x401e41dc <+0>: push {r11, lr}
0x401e41e0 <+4>: mov r11, sp
0x401e41e4 <+8>: sub sp, sp, #8
0x401e41e8 <+12>: ldr r0, [r0]
0x401e41ec <+16>: str r0, [sp, #4]
0x401e41f0 <+20>: mov r0, r1
0x401e41f4 <+24>: ldr r1, [sp, #4]
=> 0x401e41f8 <+28>: blx r1
0x401e41fc <+32>: and r0, r0, #1
0x401e4200 <+36>: and r0, r0, #1
0x401e4204 <+40>: mov sp, r11
0x401e4208 <+44>: pop {r11, lr}
0x401e420c <+48>: bx lr
blx instruction is available from ARM architecture v5 and above…
Any idea why/where is this instruction generated ?
Many thanks
Frédéric.